A hardware tile that runs a real LLM (Qwen2.5-0.5B) on FPGA — one transformer decoder layer in RTL, every silicon value bit-exact against a golden model. 80× measured speedup, full evidence trail.
SigmanticAI/apex-inference-tile: A hardware tile that runs a real LLM (Qwen2.5-0.5B) on FPGA — one transformer decoder layer in RTL, every silicon value bit-exact against a golden model. 80× measured speedup, full evidence trail.
